EPM7128SLI84-15 vs EPM7128SLI84-10 Comparison
Detailed side-by-side comparison of EPM7128SLI84-15 by Intel and EPM7128SLI84-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7128SLI84-15 | EPM7128SLI84-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000S |
| Series | EPM7128S | — |
| Device Type | EE PLD (CPLD) | — |
| Macrocells | 128 | — |
| Logic Elements | 250 (approx.) | — |
| User I/O Pins | 84 (68 in 84-pin PLCC per some sources) | — |
| Propagation Delay (tpd) | 15 ns | — |
| Supply Voltage (VCCINT) | 4.5 V to 5.5 V | 5.0 V |
| I/O Voltage Tolerance | 3.3 V or 5.0 V (configurable) | — |
| Process Technology | CMOS EEPROM | CMOS |
| Program Memory Type | EEPROM (in-system programmable) | — |
| Package | PLCC-84 (Plastic Leaded Chip Carrier, J-lead) | 84-pin PLCC |
| Operating Temperature | -40 C to +85 C (Industrial grade, 'I' suffix) | -40 °C to +85 °C (industrial) |
| Pin Count | 84 | — |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount / Socket |
| RoHS Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: lead-free variant is -10N suffix] |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Maximum User Flash Endurance | 100 program/erase cycles | — |
| Data Retention | 20 years | — |
| Usable Gates | — | 2.5K |
| Macro Cells | — | 128 |
| User I/Os | — | 68 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Frequency | — | 100 MHz |
| Configuration Memory | — | EEPROM (in-system programmable) |
| JTAG Support | — | Yes (IEEE 1149.1) |