EPM7128SQI100-10N vs EPM7128AETI100-7N Comparison

Detailed side-by-side comparison of EPM7128SQI100-10N by Intel and EPM7128AETI100-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SQI100-10N EPM7128AETI100-7N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Family MAX 7000S MAX 7000A CPLD
Device Type CPLD - Complex Programmable Logic Device —
Macrocells 128 —
Usable Gates 2,500 (up to 5,000 usable in family) —
Logic Array Blocks (LABs) 4 —
Maximum User I/Os 84 —
Pin-to-Pin Logic Delay (tPD) 10 ns —
Maximum Operating Frequency 100 MHz —
Counter Frequency (family max) 175.4 MHz —
Supply Voltage - Core (VCCINT) 5.0 V —
Supply Voltage - I/O (VCCIO) 2.5 V / 3.3 V / 5.0 V (multiVolt) —
Technology CMOS, EEPROM-based configuration —
Package 100-pin PQFP (Plastic Quad Flat Pack) 100-pin TQFP (14x14 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature -40C to +85C (Industrial grade, 'I' suffix) -40C to +85C (Industrial)
Programming Interface JTAG (IEEE Std. 1149.1) / ByteBlaster —
RoHS Compliance Compliant (lead-free, 'N' suffix) —
Series — MAX 7000A
Macro Cells — 128
Number of Usable Gates — 2,500
Number of I/O — 84
Number of Logic Array Blocks (LABs) — 8
Propagation Delay (tPD max) — 7 ns
Maximum Operating Frequency (fCNT) — 129.9 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
I/O Bank Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V (multi-volt I/O)
Process Technology — CMOS EEPROM
In-System Programmability — Yes (JTAG IEEE 1149.1)
RoHS Status — Compliant

Datasheets & Resources

Browse All Products Create BOM Request Quote