EPM7128STI100-10N vs EPM7128SQI100-10N Comparison

Detailed side-by-side comparison of EPM7128STI100-10N by Altera and EPM7128SQI100-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128STI100-10N EPM7128SQI100-10N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.85 $15.90
Family MAX 7000S MAX 7000S
Architecture CMOS EEPROM-based CPLD β€”
Macrocells 128 128
Usable Gates 2,500 (up to 5,000 family max) 2,500 (up to 5,000 usable in family)
Logic Array Blocks (LABs) 8 4
Maximum User I/O 84 β€”
Pin-to-Pin Logic Delay (tPD) 10 ns 10 ns
Maximum Counter Frequency 175.4 MHz β€”
Supply Voltage (VCC) 5 V β€”
In-System Programmability Yes (JTAG IEEE 1149.1) β€”
JTAG Boundary-Scan Yes (BST) β€”
Package 100-pin TQFP 100-pin PQFP (Plastic Quad Flat Pack)
Operating Temperature -40C to +85C (Industrial) -40C to +85C (Industrial grade, 'I' suffix)
Mounting Type Surface Mount Surface Mount
MSL Level [DATA_NEEDED: MSL level] β€”
RoHS Status [DATA_NEEDED: RoHS status] β€”
Open-Drain I/O Option Available (per MAX 7000A feature set) β€”
Device Type β€” CPLD - Complex Programmable Logic Device
Maximum User I/Os β€” 84
Maximum Operating Frequency β€” 100 MHz
Counter Frequency (family max) β€” 175.4 MHz
Supply Voltage - Core (VCCINT) β€” 5.0 V
Supply Voltage - I/O (VCCIO) β€” 2.5 V / 3.3 V / 5.0 V (multiVolt)
Technology β€” CMOS, EEPROM-based configuration
Programming Interface β€” JTAG (IEEE Std. 1149.1) / ByteBlaster
RoHS Compliance β€” Compliant (lead-free, 'N' suffix)

Datasheets & Resources

Browse All Products Create BOM Request Quote