EPM7128STI100-10N vs EPM7128SQI100-10N 比較
詳細な並列比較: EPM7128STI100-10N メーカー: Altera および EPM7128SQI100-10N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N ObsoleteIntel
EPM7128SQI100-10N - 128-Macrocell MAX 7000S CPLD, 10ns, PQFP-100 | Intel / Altera
EPM7128SQI100-10N Nrnd仕様比較
| パラメータ | EPM7128STI100-10N | EPM7128SQI100-10N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.85 | $15.90 |
| Family | MAX 7000S | MAX 7000S |
| Architecture | CMOS EEPROM-based CPLD | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 (up to 5,000 family max) | 2,500 (up to 5,000 usable in family) |
| Logic Array Blocks (LABs) | 8 | 4 |
| Maximum User I/O | 84 | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | 10 ns |
| Maximum Counter Frequency | 175.4 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| JTAG Boundary-Scan | Yes (BST) | — |
| パッケージ | 100-pin TQFP | 100-pin PQFP (Plastic Quad Flat Pack) |
| 動作温度 | -40C to +85C (Industrial) | -40C to +85C (Industrial grade, 'I' suffix) |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Open-Drain I/O Option | Available (per MAX 7000A feature set) | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Maximum User I/Os | — | 84 |
| Maximum Operating Frequency | — | 100 MHz |
| Counter Frequency (family max) | — | 175.4 MHz |
| Supply Voltage - Core (VCCINT) | — | 5.0 V |
| Supply Voltage - I/O (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multiVolt) |
| Technology | — | CMOS, EEPROM-based configuration |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ByteBlaster |
| RoHS Compliance | — | Compliant (lead-free, 'N' suffix) |