EPM7160ELC84-15 vs EPM7160EQC100-20 Comparison

Detailed side-by-side comparison of EPM7160ELC84-15 by Intel and EPM7160EQC100-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7160EQC100-20 EPM7160EQC100-20 - MAX 7000 CPLD, 160 Macrocells, 100-Pin PQFP

EPM7160EQC100-20 - MAX 7000 CPLD, 160 Macrocells, 100-Pin PQFP

EPM7160EQC100-20 ⚠ Last Time Buy

Specification Comparison

Parameter EPM7160ELC84-15 EPM7160EQC100-20
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Family MAX 7000 MAX 7000 CPLD
Product Type CPLD - Complex Programmable Logic Device —
Architecture EEPROM-based, second-generation MAX CMOS EEPROM-based, non-volatile
Usable Gates 3,200 3,200
Macrocells 160 160
Logic Array Blocks 4 —
Maximum I/O Pins 36 —
Pin-to-Pin Delay 15 ns —
Counter Frequency 76.9 MHz —
Supply Voltage (Vcc) 5 V —
In-System Programmability Yes (IEEE 1149.1 JTAG) Yes (IEEE 1149.1 JTAG, 4-pin)
Package Type 84-pin PLCC (J-Lead) —
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount
Operating Temperature 0 C to +70 C (commercial) 0 °C to +90 °C (commercial)
RoHS Status Contains lead / RoHS non-compliant (per Altera listing) Not RoHS compliant (legacy Altera MAX 7000)
Series — MAX 7000
Logic Array Blocks (LABs) — 10
Maximum User I/Os — 84
Pin-to-Pin Propagation Delay (tPD) — 20 ns
Maximum Internal Frequency (fCNT) — 62.5 MHz
Supply Voltage (VCCINT) — 5 V nominal (4.75 V to 5.25 V)
I/O Voltage Support — 3.3 V or 5 V configurable
Package — 100-pin Plastic Quad Flat Pack (PQFP, EQFP, EQC100)
Reprogram Cycles (typical) — 100
Logic Elements per Macrocell — 36 product terms (expandable)

Datasheets & Resources

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