EPM7160EQC160-12 vs EPM7160SQC160-7 Comparison
Detailed side-by-side comparison of EPM7160EQC160-12 by Intel and EPM7160SQC160-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7160EQC160-12 | EPM7160SQC160-7 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Family | MAX 7000E | MAX 7000S |
| Macrocells | 160 | 160 |
| Logic Array Blocks (LABs) | 4 | 10 |
| Usable Gates | 3,200 | — |
| User I/O Pins | 104 | — |
| Pin-to-Pin Logic Delay (tPD) | 12 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | 4.75 V to 5.25 V (5.0 V nominal) |
| I/O Voltage | 5.0 V | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| Non-volatile Configuration | EEPROM | — |
| Global Clocks | 4 | 2 |
| Operating Temperature | 0 °C to +70 °C (Commercial) | 0 °C to 70 °C (commercial) |
| Package | PQFP-160 (EQC), Gull-Wing | 160-pin PQFP (BQFP, 28x28 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Not Compliant (per Arrow listing) |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Usable System Gates | — | 3,200 |
| Product Terms per Macrocell | — | 32 |
| Maximum User I/Os | — | 104 |
| Speed Grade | — | -7 (7.5 ns pin-to-pin) |
| Maximum Propagation Delay (tPD) | — | 7.5 ns |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | — | Yes (ISP via JTAG) |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 |
| Part Status | — | Obsolete |