EPM7160STC100-10N vs EPM7160STC100-6N Comparison

Detailed side-by-side comparison of EPM7160STC100-10N by Altera and EPM7160STC100-6N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7160STC100-10N

EPM7160STC100-10N - MAX 7000 CPLD, 160 Macrocells, TQFP-100 | Altera

EPM7160STC100-10N Obsolete
Altera
EPM7160STC100-6N

EPM7160STC100-6N - 160-Macro MAX 7000S CPLD, 6ns TQFP-100 | Altera

EPM7160STC100-6N Obsolete

Specification Comparison

Parameter EPM7160STC100-10N EPM7160STC100-6N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.95 $14.20
Family MAX 7000S MAX 7000S
Macrocells 160 β€”
User I/Os 84 84
Equivalent Gates 3.2K β€”
Propagation Delay (tPD) 10 ns 6 ns
Internal Operating Frequency 167 MHz max β€”
Supply Voltage (VCCINT) 4.75 V to 5.25 V β€”
I/O Voltage (VCCIO) 3.0 V to 5.25 V (MultiVolt) β€”
Logic Family CMOS CMOS
Programmable Type In-System Programmable (ISP) via JTAG β€”
Configuration Memory EEPROM (non-volatile) β€”
Package TQFP-100 (1 mm height, plastic) TQFP-100 (T100)
Operating Temperature 0C to +70C (Commercial) 0 Β°C to +70 Β°C (Commercial)
Mounting Type Surface Mount β€”
JTAG (IEEE 1149.1) Yes β€”
PCI Compliance Yes (66 MHz) β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
MSL Level [DATA_NEEDED: MSL level] β€”
Logic Type β€” CPLD (Complex Programmable Logic Device)
Macro Cells β€” 160
Gates (typical) β€” 3,200
Internal Frequency β€” 149.3 MHz (max)
Supply Voltage β€” 5 V
Program Memory Type β€” EEPROM (non-volatile)
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)
Package Code β€” LFQFP, S Gull-Wing
I/O Banks β€” [DATA_NEEDED: I/O bank count]
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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