EPM7160STI100-10N vs EPM7160EQC160-12 Comparison
Detailed side-by-side comparison of EPM7160STI100-10N by Altera and EPM7160EQC160-12 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160STI100-10N - MAX 7000S CPLD, 160 Macrocells, 100MHz, TQFP-100 | Intel/Altera
EPM7160STI100-10N ⚠ Last Time Buy
Specification Comparison
| Parameter | EPM7160STI100-10N | EPM7160EQC160-12 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Active |
| Family | MAX 7000S | MAX 7000E |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 160 | 160 |
| Usable Gates | 3200 | 3,200 |
| User I/Os | 84 (per Mouser listing; up to 104 per alternate datasheets) | — |
| Logic Blocks | 10 (LABs) | — |
| Propagation Delay (tPD) | 10 ns | — |
| Internal Frequency | 100 MHz | — |
| Supply Voltage VCC | 5.0 V (3.3 V or 5 V tolerant I/O via MAX 7000S multi-voltage ISP) | — |
| Programmable Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG/IEEE 1149.1, 5.0V ISP) | Yes (JTAG IEEE 1149.1) |
| Operating Temperature | -40C to +85C (industrial, 'I' suffix) | 0 °C to +70 °C (Commercial) |
| Package Type | 100-pin TQFP (TQFP-100) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (lead-free per 'I' industrial suffix) | — |
| Process Technology | CMOS, EEPROM-based | — |
| Logic Array Blocks (LABs) | — | 4 |
| User I/O Pins | — | 104 |
| Pin-to-Pin Logic Delay (tPD) | — | 12 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Voltage | — | 5.0 V |
| Non-volatile Configuration | — | EEPROM |
| Global Clocks | — | 4 |
| Package | — | PQFP-160 (EQC), Gull-Wing |
| RoHS Status | — | [DATA_NEEDED: RoHS status] |
| MSL Level | — | [DATA_NEEDED: MSL level] |