EPM7192EQC160-20 vs EPM7192SQC160-15 Comparison
Detailed side-by-side comparison of EPM7192EQC160-20 by Intel and EPM7192SQC160-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 Obsolete
Specification Comparison
| Parameter | EPM7192EQC160-20 | EPM7192SQC160-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Series | MAX 7000 | — |
| Programmable Type | EE PLD (EEPROM-based) | — |
| Number of Macrocells | 192 | 192 |
| Number of Logic Array Blocks | 4 | 4 |
| Number of User I/O Pins | 124 (per package), 36 (per data source variant description) | — |
| Delay Time (tPD) | 20 ns | — |
| Internal Counter Frequency (fCNT) | 100 MHz typical | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Operating Temperature | -40C to +85C (industrial) | — |
| Package / Case | 160-BQFP / 160-PQFP (28x28 mm) | — |
| Mounting Type | Surface Mount | Surface Mount |
| In-System Programmable (ISP) | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) | — |
| Programmable Security Bit | Yes | — |
| Power-Saving Mode | Yes, programmable per macrocell | — |
| MSL Level | [DATA_NEEDED: MSL rating] | — |
| RoHS Status | [DATA_NEEDED: RoHS status - non-RoHS era part] | — |
| Family | — | MAX 7000S |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Number of Usable Gates | — | 3750 |
| User I/O Pins | — | 124 |
| Pin-to-Pin Logic Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Supply Voltage | — | 5.0 V |
| Programmability | — | In-System (ISP) via JTAG IEEE Std 1149.1 |
| Configuration Memory | — | EEPROM, non-volatile |
| Package | — | PQFP-160 |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |
| Process Technology | — | CMOS, EEPROM-based |