EPM7192EQC160-20 vs EPM7192SQC160-15 对比
详细并排对比 EPM7192EQC160-20 出自 Intel 和 EPM7192SQC160-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 Obsolete
规格对比
| 参数 | EPM7192EQC160-20 | EPM7192SQC160-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $58.26 | $8.75 |
| Series | MAX 7000 | — |
| Programmable Type | EE PLD (EEPROM-based) | — |
| Number of Macrocells | 192 | 192 |
| Number of Logic Array Blocks | 4 | 4 |
| Number of User I/O Pins | 124 (per package), 36 (per data source variant description) | — |
| Delay Time (tPD) | 20 ns | — |
| Internal Counter Frequency (fCNT) | 100 MHz typical | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| 工作温度 | -40C to +85C (industrial) | — |
| 封装 / 外壳 | 160-BQFP / 160-PQFP (28x28 mm) | — |
| 安装类型 | Surface Mount | Surface Mount |
| In-System Programmable (ISP) | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) | — |
| Programmable Security Bit | Yes | — |
| Power-Saving Mode | Yes, programmable per macrocell | — |
| MSL 等级 | [DATA_NEEDED: MSL rating] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status - non-RoHS era part] | — |
| Family | — | MAX 7000S |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Number of Usable Gates | — | 3750 |
| User I/O Pins | — | 124 |
| Pin-to-Pin Logic Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| 电源电压 | — | 5.0 V |
| Programmability | — | In-System (ISP) via JTAG IEEE Std 1149.1 |
| Configuration Memory | — | EEPROM, non-volatile |
| 封装 | — | PQFP-160 |
| 工作温度范围 | — | [DATA_NEEDED: operating temperature range] |
| Process Technology | — | CMOS, EEPROM-based |