EPM7192SQC160-10N vs EPM7192SQI160-10N Comparison
Detailed side-by-side comparison of EPM7192SQC160-10N by Altera and EPM7192SQI160-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7192SQC160-10N - 192-Macrocell MAX 7000S CPLD, 10ns, 160-Pin PQFP | Altera
EPM7192SQC160-10N Nrnd
Specification Comparison
| Parameter | EPM7192SQC160-10N | EPM7192SQI160-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Series | MAX 7000S | MAX 7000S |
| Family | MAX 7000 | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Usable Gates | 3,750 | 3.75K (typical) |
| User I/O Pins | 124 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (5V ISP, JTAG) |
| Package / Case | 160-BQFP (PQFP, 0.65 mm pitch) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: commercial/industrial grade] | 0C to +70C (industrial, 'N' suffix) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant (per lead-free PQFP package marking) |
| Architecture | — | Second-generation MAX (CMOS, EEPROM) |
| Logic Elements / Macrocells | — | 192 macrocells |
| User I/Os | — | 124 |
| Pin Count | — | 160 |
| Package | — | PQFP-160 (QFP-160, plastic) |
| Maximum Internal Frequency | — | 167 MHz |
| Supply Voltage (VCCIO) | — | 5.0 V |
| Boundary-Scan Support | — | IEEE 1149.1 (JTAG) |
| Technology | — | 5V CMOS, EEPROM configuration memory |
| Logic Family | — | CMOS |
| Propagation Delay | — | 7.5 ns to 10 ns (speed grade dependent) |