EPM7256AEQI208-7N vs EPM7256AETC100-10N Comparison

Detailed side-by-side comparison of EPM7256AEQI208-7N by Altera and EPM7256AETC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7256AEQI208-7N EPM7256AETC100-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $13.10
Family MAX 7000A MAX 7000A
Macrocells 256 β€”
Usable Gates 5,000 5,000
User I/O Pins 164 β€”
Logic Array Blocks 16 β€”
Pin-to-Pin Propagation Delay (tPD) 7.5 ns β€”
Maximum Internal Frequency 126.6 MHz β€”
Supply Voltage 3.3 V β€”
Configuration Technology EEPROM (non-volatile) β€”
Package 208-pin PQFP (FQFP) 100-pin TQFP
Number of Terminals 208 β€”
Terminal Form Gull Wing β€”
Package Shape Square β€”
Mounting Type Surface Mount Surface Mount
Operating Temperature Grade Industrial β€”
Speed Grade -7 β€”
RoHS Status Compliant (N suffix) [DATA_NEEDED: not confirmed in provided data]
Lead Finish [DATA_NEEDED: lead finish] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Macro Cells β€” 256
Maximum User I/Os β€” 84
Logic Elements / LABs β€” 16 Logic Array Blocks
Pin-to-Pin Logic Delay β€” 10 ns
Maximum Operating Frequency β€” 125 MHz
Supply Voltage (Core) β€” 3.3 V
MultiVolt I/O Support β€” 2.5 V / 3.3 V / 5.0 V
Programmability β€” EEPROM, in-system via JTAG (IEEE 1149.1)
Operating Temperature Range β€” 0C to +70C (commercial) [DATA_NEEDED: explicit grade from datasheet]
Process Technology β€” 0.30 Β΅m EEPROM
Dedicated Inputs β€” 4 (global clock / clear / OE)
Lead-Free / Pb-Free β€” [DATA_NEEDED: not confirmed in provided data]

Datasheets & Resources

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