EPM7256AETC100-7 vs EPM7256AEFC100-10N Comparison
Detailed side-by-side comparison of EPM7256AETC100-7 by Intel and EPM7256AEFC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7256AETC100-7 - 256-Macrocell MAX 7000A CPLD, 7.5ns TQFP-100 | Intel
EPM7256AETC100-7 ObsoleteAltera
EPM7256AEFC100-10N - MAX 7000 CPLD, 256 Macro, 10ns, 100-FBGA | Altera
EPM7256AEFC100-10N NrndSpecification Comparison
| Parameter | EPM7256AETC100-7 | EPM7256AEFC100-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 7000A | — |
| Series | EPM7256 | MAX 7000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Technology | EEPROM-based, CMOS | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | — |
| Number of I/Os | 84 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| Core Supply Voltage | 3.3 V | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Maximum Operating Frequency | 126.6 MHz | — |
| Operating Temperature | 0C to +70C (Commercial) | 0°C to +70°C (commercial) |
| Package | TQFP-100 (ET100) | 100-LBGA (11 x 11 mm), FineLine BGA |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) - In-System Programmable | — |
| RoHS Status | Unknown - part marked obsolete | [DATA_NEEDED: RoHS status] |
| Memory Type | EEPROM (non-volatile) | — |
| Manufacturer | — | Altera (now Intel) |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O | — | 84 |
| Number of Gates | — | 5000 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | 154.8 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Tolerance | — | 5 V tolerant (multiVolt I/O) |
| Programmability | — | EEPROM, In-System Programmable (JTAG IEEE 1149.1) |
| Process Technology | — | 0.30 µm EEPROM CMOS |