EPM7256SQC208-10 vs EPM7256SQC208-15N Comparison
Detailed side-by-side comparison of EPM7256SQC208-10 by Intel and EPM7256SQC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7256SQC208-10 - MAX 7000S CPLD, 256 Macrocells, 10ns, 208-PQFP | Intel
EPM7256SQC208-10 ObsoleteSpecification Comparison
| Parameter | EPM7256SQC208-10 | EPM7256SQC208-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.20 | $0.00 |
| Series | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | β |
| Usable Gates | 5,000 | β |
| Number of I/O Pins | 164 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Counter Speed (fCNT) | Up to 175.4 MHz | β |
| Package | 208-pin PQFP (SQC208) | 208-pin PQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Technology | EEPROM (in-system programmable) | β |
| JTAG Support (IEEE 1149.1) | Yes | β |
| PCI Compliance | PCI Local Bus Specification 2.2 compliant | β |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| MSL Level | 3 (168 hours) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Lead free / RoHS Compliant |
| User I/O Pins | β | 164 |
| Pin-to-Pin Delay | β | 15 ns (speed grade -15) |
| Supply Voltage | β | 5 V |
| Configuration Memory | β | EEPROM (non-volatile) |
| JTAG Interface | β | IEEE 1149.1 boundary-scan |
| In-System Programmability | β | Yes (ISP) |
| Logic Array Blocks | β | 16 macrocells per LAB |
| Interconnect | β | Programmable Interconnect Array (PIA) |
| Speed Grade | β | -15 |
| Product Category | β | CPLD - Complex Programmable Logic Devices |
| Manufacturer | β | Altera (Intel Programmable Solutions Group) |