EPM7256SQC208-10 vs EPM7256SQC208-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7256SQC208-10 sa pamamagitan ng Intel at EPM7256SQC208-15N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7256SQC208-10 | EPM7256SQC208-15N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Family / Series | MAX 7000 | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 5000 | — |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Volte ng Pagbibigay | 5.0 V | 5 V |
| Configuration Technology | EEPROM | — |
| Packhaging | 208-pin PQFP | 208-pin PQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| In-System Programmability | Yes (ISP) | Yes (ISP) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Lead free / RoHS Compliant |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | [DATA_NEEDED: MSL level] | — |
| Speed Grade | -10 (10 ns) | -15 |
| Series | — | MAX 7000S |
| Pin-to-Pin Delay | — | 15 ns (speed grade -15) |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Interface | — | IEEE 1149.1 boundary-scan |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Logic Array Blocks | — | 16 macrocells per LAB |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Product Category | — | CPLD - Complex Programmable Logic Devices |
| Manufacturer | — | Altera (Intel Programmable Solutions Group) |