EPM7256SQC208-10 vs EPM7256SQC208-7 Comparison

Detailed side-by-side comparison of EPM7256SQC208-10 by Intel and EPM7256SQC208-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7256SQC208-10 EPM7256SQC208-7
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $11.20 $0.00
Series MAX 7000S β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 256 256
Logic Array Blocks (LABs) 16 β€”
Usable Gates 5,000 5,000
Number of I/O Pins 164 β€”
Propagation Delay (tPD) 10 ns 7.5 ns
Counter Speed (fCNT) Up to 175.4 MHz β€”
Package 208-pin PQFP (SQC208) 208-pin PQFP (28 x 28 mm, 0.5 mm pitch)
Mounting Type Surface Mount Surface Mount
Programmable Technology EEPROM (in-system programmable) β€”
JTAG Support (IEEE 1149.1) Yes β€”
PCI Compliance PCI Local Bus Specification 2.2 compliant β€”
Operating Temperature 0C to +70C (commercial) β€”
MSL Level 3 (168 hours) [DATA_NEEDED: MSL level]
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Device Family β€” MAX 7000S (EPM7256S)
User I/O Pins β€” 164
Maximum Operating Frequency (fMAX) β€” 128.2 MHz
Supply Voltage (VCC) β€” 5.0 V
Configuration Technology β€” EEPROM (non-volatile)
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)
Operating Temperature Range β€” Commercial (0C to +70C)
Minimum DC Input Voltage β€” -0.5 V
Input Undershoot Tolerance β€” -2.0 V for <100 mA, <20 ns
Speed Grade β€” -7 (7.5 ns)
Logic Levels β€” 5.0 V CMOS/TTL compatible

Datasheets & Resources

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