EPM7256SQC208-15 vs EPM7256SRC208-15N Comparison
Detailed side-by-side comparison of EPM7256SQC208-15 by Altera and EPM7256SRC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256SQC208-15 | EPM7256SRC208-15N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 7000S | — |
| Series | EPM7256 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Usable Gates | 5000 | 5,000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Delay (tPD) | 15 ns | 15 ns |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Operating Temperature Range | 0 C to +70 C (Commercial) | — |
| Package | 208-pin PQFP (28x28 mm) | 208-pin RQFP (PowerQuad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Power Mode | Yes (per-macrocell turbo-bit) | — |
| JTAG (IEEE 1149.1) Boundary-Scan | Yes | — |
| In-System Programmability (ISP) | Yes | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| RoHS Status | Contains lead / RoHS non-compliant (per third-party listing) | Compliant (N suffix) |
| Lead-Free Status | Contains lead | — |
| Maximum Counter Frequency | — | 76.9 MHz |
| Supply Voltage | — | 5 V |
| Operating Temperature | — | 0C to +70C (commercial) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| I/O Standard | — | 5 V TTL/CMOS compatible |
| Lead Free | — | Yes (N suffix) |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| Number of Terminals | — | 208 |