EPM7256SQC208-15 vs EPM7256SRC208-15N Vergleich
Detaillierter Direktvergleich von EPM7256SQC208-15 von Altera und EPM7256SRC208-15N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7256SQC208-15 | EPM7256SRC208-15N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3,65 | $27,20 |
| Family | MAX 7000S | — |
| Series | EPM7256 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Usable Gates | 5000 | 5,000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Delay (tPD) | 15 ns | 15 ns |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Betriebstemperaturbereich | 0 C to +70 C (Commercial) | — |
| Gehäuse | 208-pin PQFP (28x28 mm) | 208-pin RQFP (PowerQuad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Programmable Power Mode | Yes (per-macrocell turbo-bit) | — |
| JTAG (IEEE 1149.1) Boundary-Scan | Yes | — |
| In-System Programmability (ISP) | Yes | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| RoHS-Status | Contains lead / RoHS non-compliant (per third-party listing) | Compliant (N suffix) |
| Lead-Free Status | Contains lead | — |
| Maximum Counter Frequency | — | 76.9 MHz |
| Versorgungsspannung | — | 5 V |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| I/O Standard | — | 5 V TTL/CMOS compatible |
| Lead Free | — | Yes (N suffix) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Number of Terminals | — | 208 |