EPM7256SQC208-15N vs EPM7256SRC208-10 Comparison

Detailed side-by-side comparison of EPM7256SQC208-15N by Altera and EPM7256SRC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7256SQC208-15N EPM7256SRC208-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Series MAX 7000S —
Macrocells 256 —
User I/O Pins 164 —
Pin-to-Pin Delay 15 ns (speed grade -15) —
Supply Voltage 5 V —
Package 208-pin PQFP 208-pin RQFP (BFQFP) exposed pad, 28x28 mm
Mounting Type Surface Mount Surface Mount
Configuration Memory EEPROM (non-volatile) —
JTAG Interface IEEE 1149.1 boundary-scan —
In-System Programmability Yes (ISP) —
Operating Temperature [DATA_NEEDED: operating temperature range] 0C to +70C (TA, commercial)
RoHS Status Lead free / RoHS Compliant [DATA_NEEDED: RoHS status]
Logic Array Blocks 16 macrocells per LAB —
Interconnect Programmable Interconnect Array (PIA) —
Speed Grade -15 —
Product Category CPLD - Complex Programmable Logic Devices —
Manufacturer Altera (Intel Programmable Solutions Group) —
Family — MAX 7000S
Device Type — CPLD (Complex Programmable Logic Device)
Number of Macrocells — 256
Number of Logic Array Blocks (LABs) — 16
Number of Gates — 5000
Number of User I/O Pins — 164
Maximum Propagation Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Supply Voltage (Internal) — 4.75 V to 5.25 V
Programmable Type — In System Programmable (ISP, JTAG)
Configuration Technology — EEPROM
Terminal Form — Gull Wing
Package Shape — Square
Product Status — Obsolete

Datasheets & Resources

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