EPM9320ABC356-10 vs EPM9560ABC356-10 Comparison
Detailed side-by-side comparison of EPM9320ABC356-10 by Altera and EPM9560ABC356-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9320ABC356-10 - MAX 9000 CPLD 6K Gates 320 Macros 356-BGA | Altera
EPM9320ABC356-10 Obsolete
Specification Comparison
| Parameter | EPM9320ABC356-10 | EPM9560ABC356-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX), third-generation | — |
| Process Technology | CMOS EEPROM | — |
| Usable Gates | 6,000 | 12,000 |
| Macro Cells | 320 | — |
| Maximum Operating Frequency | 144.9 MHz | — |
| Pin-to-Pin Delay (Speed Grade) | 10 ns | — |
| Supply Voltage (VCC) | 5.0 V | — |
| In-System Programmability (ISP) | Yes, via IEEE 1149.1 JTAG | — |
| Package | 356-pin BGA | 356-LBGA (35 x 35 mm) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Non-Volatile Configuration | Yes (EEPROM) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0 °C to 70 °C (Commercial) |
| Device Family | — | MAX 9000A |
| Product Series | — | MAX 9000 |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 35 |
| Maximum User I/Os | — | 216 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 144 MHz |
| Supply Voltage | — | 4.75 V to 5.25 V (5 V nominal) |
| Programmability | — | EEPROM, 5-V In-System Programmable (ISP) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 |