EPM9320ARC208-10 vs EPM9320RC208-20N Comparison
Detailed side-by-side comparison of EPM9320ARC208-10 by Altera and EPM9320RC208-20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ARC208-10 | EPM9320RC208-20N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.40 | $0.00 |
| Device Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 320 | β |
| Usable Gates | 6,000 | 6,000 |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Frequency | 144.9 MHz | β |
| Supply Voltage | 5.0 V | 5.0 V |
| Logic Blocks (LABs) | 16 | β |
| Programmability | EEPROM, in-system programmable via JTAG | β |
| JTAG Support | IEEE Std. 1149.1 compliant | β |
| Speed/Power Optimization | Per-macrocell programmable, 50% power mode available | β |
| Package | RQFP-208 (Power Quad Flat Pack) | 208-pin RQFP (PowerQuad II) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Logic Type | β | Complex Programmable Logic Device (CPLD) |
| Macro Cells | β | 320 |
| Logic Array Blocks | β | 20 |
| Maximum Pin-to-Pin Delay (tPD) | β | 20 ns |
| Maximum Operating Frequency | β | 100 MHz |
| Configuration Memory | β | EEPROM (non-volatile) |
| In-System Programmability | β | Yes, via IEEE Std. 1149.1 JTAG |
| User I/O Pins | β | 168 |
| Lead Finish | β | [DATA_NEEDED: lead finish] |
| MSL Level | β | [DATA_NEEDED: MSL level] |