EPM9320ARC208-10N vs EPM9320RC208-15N Comparison
Detailed side-by-side comparison of EPM9320ARC208-10N by Altera and EPM9320RC208-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ARC208-10N | EPM9320RC208-15N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 320 | 320 |
| Logic Gates | 6,000 gates | — |
| Logic Array Blocks (LABs) | 16 | — |
| Propagation Delay (tPD) | 10 ns | 15 ns |
| Maximum Frequency | 144.9 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| User I/O Pins | 168 | — |
| Dedicated Input Pins | 12 | — |
| Package | 208-pin RQFP (BFQFP with exposed pad) | 208-pin RQFP (PowerQuad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (Commercial) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| Configuration Memory | Non-volatile EEPROM | — |
| RoHS Status | Compliant (lead-free 'N' suffix) | [DATA_NEEDED: RoHS status] |
| Usable Gates | — | 6,000 |
| Flip-Flops | — | 484 |
| Configurable I/O Lines | — | 128 |
| Maximum Clock Frequency | — | 117.6 MHz |
| Supply Voltage | — | 5.0 V |
| I/O Voltage Compatibility | — | 3.3 V or 5 V |
| Configuration Technology | — | CMOS EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Terminal Pitch | — | 0.5 mm |
| Operating Temperature Range | — | 0C to +70C (commercial) |
| Packaging | — | Tray |