EPM9320RC208-15 vs EPM9320ARC208-10N Comparison
Detailed side-by-side comparison of EPM9320RC208-15 by Altera and EPM9320ARC208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9320RC208-15
EPM9320RC208-15 - MAX 9000 CPLD 320 Macro Cells 15ns | Altera
EPM9320RC208-15 ObsoleteAltera
EPM9320ARC208-10N
EPM9320ARC208-10N - 320-Macrocell MAX 9000 CPLD, 10ns | Altera
EPM9320ARC208-10N ObsoleteSpecification Comparison
| Parameter | EPM9320RC208-15 | EPM9320ARC208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $19.45 |
| Device Family | MAX 9000 | β |
| Macro Cells | 320 | 320 |
| Usable Gates | 6,000 | β |
| Pin-to-Pin Propagation Delay | 15 ns (speed grade -15) | β |
| Maximum Clock Frequency | 117.6 MHz | β |
| Supply Voltage | 5.0 V | β |
| Configuration Technology | EEPROM-based (non-volatile) | β |
| In-System Programmability | Yes (ISP via JTAG) | β |
| JTAG Interface | IEEE Std. 1149.1 | β |
| Package | 208-pin RQFP (Power QFP) | 208-pin RQFP (BFQFP with exposed pad) |
| Package Type | 208-BFQFP Exposed Pad | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| Number of I/O Pins | [DATA_NEEDED: user I/O count] | β |
| Logic Array Blocks | [DATA_NEEDED: LAB count] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (lead-free 'N' suffix) |
| Lifecycle Status | Obsolete (PDN0706, 2007) | β |
| Family | β | MAX 9000 |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Gates | β | 6,000 gates |
| Logic Array Blocks (LABs) | β | 16 |
| Propagation Delay (tPD) | β | 10 ns |
| Maximum Frequency | β | 144.9 MHz |
| Supply Voltage (VCC) | β | 5 V |
| User I/O Pins | β | 168 |
| Dedicated Input Pins | β | 12 |
| Programming Interface | β | IEEE Std. 1149.1 JTAG |
| Configuration Memory | β | Non-volatile EEPROM |