EPM9400RC240-20 vs EPM9480RC240-20 Comparison
Detailed side-by-side comparison of EPM9400RC240-20 by Altera and EPM9480RC240-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9400RC240-20 | EPM9480RC240-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Device Family | MAX 9000 | — |
| Macrocells | 400 | 480 |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Logic Elements / LABs | [DATA_NEEDED: number of LABs] | — |
| Programmable Type | In System Programmable (EEPROM) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | In-System Programmable (ISP) via IEEE 1149.1 JTAG |
| Package | 240-RQFP (32x32 mm) with exposed pad | 240-RQFP (32x32 mm, FQFP, Gull Wing) |
| Supplier Device Package | 240-RQFP | — |
| Mounting Type | Surface Mount | — |
| Operating Temperature | [DATA_NEEDED: commercial/industrial temp grade] | — |
| Technology | CMOS, EEPROM-based | — |
| I/O Count | [DATA_NEEDED: usable I/O count for 240-RQFP] | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance per data] | [DATA_NEEDED: RoHS status] |
| Architecture | MAX (Multiple Array MatriX) - third generation | — |
| Series | MAX 9000 | — |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 10,000 |
| Logic Elements | — | 30 |
| User I/O Pins | — | 175 |
| Number of Terminals | — | 240 |
| Maximum Propagation Delay (tpd) | — | 20 ns |
| Maximum Internal Frequency (fMAX, related -C variant) | — | 100 MHz |
| Programmable Flip-Flops (family) | — | 676 |
| Internal Supply Voltage | — | 4.75 V to 5.25 V |
| I/O Signaling Levels | — | 3.3 V or 5 V (configurable) |
| Process Technology | — | CMOS EEPROM |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | Gull Wing |