EPM9480RC208-15 vs EPM9480RC208-15N Comparison
Detailed side-by-side comparison of EPM9480RC208-15 by Intel and EPM9480RC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9480RC208-15 | EPM9480RC208-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Logic Cells / Macro Cells | 480 macro cells | — |
| Usable Gates | 10,000 gates | 10,000 |
| Maximum Operating Frequency | 117.6 MHz | — |
| Propagation Delay (tPD) | 15 ns | — |
| User I/O Pins | 153 | — |
| Supply Voltage | 5.0 V | 5.0 V |
| Programmability | In-System (ISP) via JTAG IEEE 1149.1 | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Package | RQFP-208 | 208-pin RQFP |
| Operating Temperature | -40C to +85C (commercial) | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | Multiple Array MatriX (MAX) third-generation |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | ROHS3 Compliant |
| MSL Level | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 480 |
| Maximum Frequency | — | 117.6 MHz |
| Propagation Delay | — | 15 ns (speed grade -15) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Moisture Sensitivity Level | — | MSL 3 (168 Hours) |
| Manufacturer Standard Lead Time | — | 1-7 Days |