EPM9480RC240-20 vs EPM9560ARC240-10N Comparison
Detailed side-by-side comparison of EPM9480RC240-20 by Altera and EPM9560ARC240-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoleteSpecification Comparison
| Parameter | EPM9480RC240-20 | EPM9560ARC240-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 480 | — |
| Usable Gates | 10,000 | — |
| Logic Elements | 30 | — |
| User I/O Pins | 175 | — |
| Number of Terminals | 240 | — |
| Package | 240-RQFP (32x32 mm, FQFP, Gull Wing) | 240-pin RQFP (32x32 mm) |
| Maximum Propagation Delay (tpd) | 20 ns | — |
| Maximum Internal Frequency (fMAX, related -C variant) | 100 MHz | — |
| Programmable Flip-Flops (family) | 676 | — |
| Internal Supply Voltage | 4.75 V to 5.25 V | — |
| I/O Signaling Levels | 3.3 V or 5 V (configurable) | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Programming Interface | In-System Programmable (ISP) via IEEE 1149.1 JTAG | IEEE 1149.1 JTAG / ByteBlaster |
| Operating Temperature Grade | Commercial | — |
| Terminal Form | Gull Wing | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-RoHS (legacy Altera part) |
| Logic Family | — | MAX 9000 (CPLD) |
| Macro Cells | — | 560 |
| User I/Os | — | 191 |
| Logic Array Blocks (LABs) | — | 16 |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Frequency (fMAX) | — | 145 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Operating Temperature | — | 0°C to +70°C (Commercial) |
| Mounting Type | — | Surface Mount |
| Programmability | — | In-system, EEPROM-based (non-volatile) |
| I/O Standard | — | 5.0 V TTL-compatible |