EPM9560ARC240-10N vs EPM9560ARC240-10 Comparison
Detailed side-by-side comparison of EPM9560ARC240-10N by Altera and EPM9560ARC240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoleteSpecification Comparison
| Parameter | EPM9560ARC240-10N | EPM9560ARC240-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Logic Family | MAX 9000 (CPLD) | CMOS |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Macro Cells | 560 | — |
| User I/Os | 191 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Internal Frequency (fMAX) | 145 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Operating Temperature | 0°C to +70°C (Commercial) | 0C to +70C (commercial) |
| Package | 240-pin RQFP (32x32 mm) | 240-pin PowerQuad QFP (RQFP / EAR240) |
| Mounting Type | Surface Mount | — |
| Programming Interface | IEEE 1149.1 JTAG / ByteBlaster | — |
| Programmability | In-system, EEPROM-based (non-volatile) | — |
| I/O Standard | 5.0 V TTL-compatible | — |
| RoHS Status | Non-RoHS (legacy Altera part) | [DATA_NEEDED: RoHS status] |
| Family | MAX 9000 | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Usable Gates | — | 12,000 |
| Macrocells | — | 560 |
| User I/Os (this package) | — | 191 (per Mouser listing) |
| Internal Frequency | — | 144.9 MHz |
| Propagation Delay (tpd) | — | 11.4 ns |
| Supply Voltage - Internal (VCCINT) | — | 5.0 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V (selectable) |
| Configuration Memory | — | EEPROM (non-volatile, in-system programmable) |