EPM9560ARI240-10 vs EPM9560ARC208-10 Comparison

Detailed side-by-side comparison of EPM9560ARI240-10 by Altera and EPM9560ARC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560ARI240-10 EPM9560ARC208-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Usable Gates 12,000 12,000 gates
Macro Cells 560 β€”
User I/O Pins 191 153 I/O
Package 240-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP (PowerQuad Flat Pack) with exposed pad
Pin-to-Pin Propagation Delay 10 ns β€”
Internal Frequency 144.9 MHz 144.9 MHz
Supply Voltage 5.0 V 5.0 V
Technology CMOS, EEPROM-based configuration β€”
Operating Temperature Range -40 C to +85 C (industrial) β€”
Mounting Type Surface Mount Surface Mount
Configuration Memory EEPROM (non-volatile, instant-on) β€”
Logic Architecture Multiple Array MatriX (MAX) with global interconnect array β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Moisture Sensitivity Level [DATA_NEEDED: MSL level] β€”
Number of Terminals 240 β€”
Terminal Form Gull Wing β€”
Device Family β€” MAX 9000A (Multiple Array MatriX)
Programmable Logic Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 560 macrocells
Logic Array Blocks β€” 35 LABs
Propagation Delay (tPD) β€” 10 ns (speed grade -10)
Logic Family β€” CMOS
Configuration Technology β€” EEPROM (non-volatile, in-system programmable)
JTAG Interface β€” IEEE 1149.1 boundary-scan (ISP)
Operating Temperature β€” 0 C to +70 C (commercial)
Pin Count β€” 208 pins

Datasheets & Resources

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