EPM9560RC208-12 vs EPM9560RC208-16 Comparison
Detailed side-by-side comparison of EPM9560RC208-12 by Altera and EPM9560RC208-16 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC208-16 - MAX 9000 CPLD, 560 Macrocells, 208-RQFP | Intel / Altera
EPM9560RC208-16 NrndSpecification Comparison
| Parameter | EPM9560RC208-12 | EPM9560RC208-16 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Flip-Flops | 772 | — |
| Usable Gates | 12000 | 12,000 (typical) |
| User I/O Lines | 153 | — |
| Propagation Delay (tPD) | 12 ns | — |
| Maximum Clock Frequency | 125 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Package | 208-pin RQFP (S-PQFP-G208) | 208-pin Power Quad Flat Pack (RQFP) |
| Terminal Pitch | 0.50 mm | — |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: industrial/commercial temperature grade] |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Logic Array Blocks | 20 | — |
| Speed Grade | -12 (12 ns) | -16 |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements / Macrocells | — | 560 macrocells |
| Typical Gates | — | 12,000 gates |
| Pin-to-Pin Delay (tPD) | — | 16 ns |
| Maximum Internal Frequency (fMAX) | — | 117.6 MHz |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V |
| User I/O Pins | — | 416 |
| Process Technology | — | 0.35 µm CMOS EEPROM |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |