EPM9560RC208-15N vs EPM9480RC208-15N Comparison
Detailed side-by-side comparison of EPM9560RC208-15N by Intel and EPM9480RC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM9560RC208-15N | EPM9480RC208-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Obsolete |
| Series | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 10,000 |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O | 212 (in 208-RQFP, see family datasheet) | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Configuration Memory | CMOS EEPROM (non-volatile) | EEPROM (non-volatile) |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP |
| Operating Temperature (commercial) | 0C to +70C | — |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] | ROHS3 Compliant |
| Speed Grade | -15 (15 ns tPD) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array MatriX (MAX) third-generation |
| Family | — | MAX 9000 |
| Macro Cells | — | 480 |
| Maximum Frequency | — | 117.6 MHz |
| Propagation Delay | — | 15 ns (speed grade -15) |
| Supply Voltage | — | 5.0 V |
| In-System Programmability | — | Yes (ISP via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Operating Temperature | — | [DATA_NEEDED: operating temperature range] |
| Moisture Sensitivity Level | — | MSL 3 (168 Hours) |
| Manufacturer Standard Lead Time | — | 1-7 Days |