EPM9560RC208-15N vs EPM9560ARC208-10N Comparison
Detailed side-by-side comparison of EPM9560RC208-15N by Intel and EPM9560ARC208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM9560RC208-15N | EPM9560ARC208-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Obsolete |
| Series | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 20 |
| User I/O | 212 (in 208-RQFP, see family datasheet) | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Configuration Memory | CMOS EEPROM (non-volatile) | EEPROM (non-volatile) |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (PowerQuad II) |
| Operating Temperature (commercial) | 0C to +70C | — |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] | Compliant (N suffix) |
| Speed Grade | -15 (15 ns tPD) | -10 |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Family | — | MAX 9000 |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay | — | 10 ns |
| Internal Counter Frequency | — | 144.9 MHz |
| Supply Voltage | — | 5 V |
| Technology | — | CMOS EEPROM |
| Operating Temperature | — | 0 C to +70 C (commercial) |
| In-System Programmability | — | Yes (JTAG ISP) |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| MSL Level | — | [DATA_NEEDED: MSL level] |