EPM9560RC208-15N vs EPM9560RC208-17 Comparison
Detailed side-by-side comparison of EPM9560RC208-15N by Intel and EPM9560RC208-17 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM9560RC208-15N | EPM9560RC208-17 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | NRND |
| Series | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O | 212 (in 208-RQFP, see family datasheet) | — |
| Pin-to-Pin Delay (tPD) | 15 ns | 17 ns |
| Maximum Internal Frequency | 117.6 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Configuration Memory | CMOS EEPROM (non-volatile) | — |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (RC208) |
| Operating Temperature (commercial) | 0C to +70C | — |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] | — |
| Speed Grade | -15 (15 ns tPD) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | Third-generation MAX (AND-OR PLA) |
| Family | — | MAX 9000 |
| Product Type | — | CPLD (EPLD, in-system programmable) |
| Macro Cells | — | 560 |
| Maximum Counter Frequency | — | 117.6 MHz |
| User I/O Pins | — | 212 |
| Supply Voltage (VCC) | — | 5 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| Program/Erase Cycles | — | 100 minimum |
| JTAG (IEEE 1149.1) Support | — | Yes |