EPM9560RC208-16 vs EPM9560RC208-15N Comparison
Detailed side-by-side comparison of EPM9560RC208-16 by Intel and EPM9560RC208-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC208-16 - MAX 9000 CPLD, 560 Macrocells, 208-RQFP | Intel / Altera
EPM9560RC208-16 NrndIntel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM9560RC208-16 | EPM9560RC208-15N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Last Time Buy |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | 560 macrocells | — |
| Typical Gates | 12,000 gates | — |
| Usable Gates | 12,000 (typical) | 12,000 |
| Pin-to-Pin Delay (tPD) | 16 ns | 15 ns |
| Maximum Internal Frequency (fMAX) | 117.6 MHz | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V | — |
| User I/O Pins | 416 | — |
| Package | 208-pin Power Quad Flat Pack (RQFP) | 208-pin RQFP (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| Programmability | In-system via JTAG (IEEE 1149.1) | In-system via IEEE 1149.1 JTAG |
| Operating Temperature | [DATA_NEEDED: industrial/commercial temperature grade] | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] |
| Speed Grade | -16 | -15 (15 ns tPD) |
| Series | — | MAX 9000 |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O | — | 212 (in 208-RQFP, see family datasheet) |
| Maximum Internal Frequency | — | 117.6 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Configuration Memory | — | CMOS EEPROM (non-volatile) |
| Operating Temperature (commercial) | — | 0C to +70C |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |