EPM9560RC304-15N vs EPM9560RC304-10 Comparison
Detailed side-by-side comparison of EPM9560RC304-15N by Altera and EPM9560RC304-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC304-15N | EPM9560RC304-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| Usable Gates | 12,000 | 16000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 (estimated from 560 macrocells) | — |
| Maximum Operating Frequency (fMAX) | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay | 15 ns (-15 speed grade) | 12 ns |
| Supply Voltage (VCCINT) | 5 V | — |
| Package | RQFP-304 | RQFP-304 (RC) |
| User I/O Count | 304 (package-level) | — |
| Process Technology | High-performance CMOS EEPROM | 0.65 µm CMOS EEPROM |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Operating Temperature Grade | Commercial (suffix N) | — |
| RoHS Status | Compliant (lead-free per suffix N marking) | ROHS3 Compliant |
| Device Type | — | CPLD / EPLD |
| Logic Elements | — | 560 |
| Pin Count | — | 304 |
| Speed Grade | — | -10 |
| Supply Voltage | — | 5 V |
| Operating Temperature | — | [DATA_NEEDED: operating temperature range] |
| User I/O Pins | — | 304 (package-limited) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Programming Method | — | JTAG in-system (ISP) |
| Mounting Type | — | Surface Mount |
| MSL Level | — | 3 (168 Hours) |