EPM9560RC304-2 vs EPM9560RC304-15N Comparison
Detailed side-by-side comparison of EPM9560RC304-2 by Intel and EPM9560RC304-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-2 | EPM9560RC304-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD - Erasable PLD) | — |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 (estimated from 560 macrocells) |
| Macrocells | [DATA_NEEDED: macrocell count] | 560 |
| User I/O Pins | 304 | — |
| Package | 304-pin RQFP (RC) | RQFP-304 |
| Speed Grade | -2 | — |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | — |
| Operating Temperature | Commercial (0C to +70C) | — |
| Mounting Type | Surface Mount | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free per suffix N marking) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array MatriX (MAX) - 3rd generation |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum Operating Frequency (fMAX) | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay | — | 15 ns (-15 speed grade) |
| Supply Voltage (VCCINT) | — | 5 V |
| User I/O Count | — | 304 (package-level) |
| Process Technology | — | High-performance CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Operating Temperature Grade | — | Commercial (suffix N) |