EPM9560RC304-2 vs EPM9560RC304-20 Comparison
Detailed side-by-side comparison of EPM9560RC304-2 by Intel and EPM9560RC304-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-2 | EPM9560RC304-20 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (EPLD - Erasable PLD) | — |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 20 |
| Macrocells | [DATA_NEEDED: macrocell count] | 560 |
| User I/O Pins | 304 | — |
| Package | 304-pin RQFP (RC) | 304-pin RQFP |
| Speed Grade | -2 | -20 |
| Core Supply Voltage | 5.0 V | 5.0 V |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | — |
| Operating Temperature | Commercial (0C to +70C) | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Device Family | — | MAX 9000 (EPM9560) |
| User I/O Lines | — | 212 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| I/O Voltage | — | 3.3 V or 5 V (configurable) |
| Configuration Technology | — | EEPROM (in-system programmable) |
| JTAG Interface | — | IEEE Std. 1149.1 (built-in) |
| MSL Level | — | [DATA_NEEDED: MSL level] |