EPM9560RC304-20 vs EPM9560RC30415 Comparison
Detailed side-by-side comparison of EPM9560RC304-20 by Altera and EPM9560RC30415 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC304-20 | EPM9560RC30415 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 (EPM9560) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| User I/O Lines | 212 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Core Supply Voltage | 5.0 V | — |
| I/O Voltage | 3.3 V or 5 V (configurable) | — |
| Configuration Technology | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 (built-in) | — |
| Package | 304-pin RQFP | 304-RQFP (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| Logic Array Blocks (LABs) | 20 | 16 (40 macro cells each) |
| Speed Grade | -20 | -15 (15 ns pin-to-pin delay) |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | Multiple Array MatriX (MAX), EEPROM-based |
| Macro Cells | — | 560 |
| User I/O Pins | — | 360 |
| Pin Count | — | 304 |
| Maximum Internal Frequency | — | 117.6 MHz |
| Supply Voltage | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Technology | — | CMOS EEPROM |