EPM9560RI304-20N vs EPM9560RC304-15C Comparison
Detailed side-by-side comparison of EPM9560RI304-20N by Intel and EPM9560RC304-15C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteSpecification Comparison
| Parameter | EPM9560RI304-20N | EPM9560RC304-15C |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 35 | 16 |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 20 ns | 15 ns |
| Internal Performance Grade | 100 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| Process Technology | CMOS EEPROM-based | CMOS EEPROM |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | Yes (IEEE 1149.1 JTAG) |
| Package | 304-pin RQFP (Plastic Quad Flat Pack) | 304-pin RQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | -40C to +85C (industrial; verify per lot) | 0 C to +70 C (Commercial) |
| RoHS Status | Unknown (legacy Altera part - confirm per lot) | [DATA_NEEDED: RoHS status] |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Macro Cells | — | 560 |
| User I/O Pins (maximum) | — | 212 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Supply Voltage | — | 5.0 V |
| Program/Erase Endurance | — | 100 cycles minimum |