EPM9560WC208-15C vs EPM9560WC208-15 Comparison
Detailed side-by-side comparison of EPM9560WC208-15C by Altera and EPM9560WC208-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560WC208-15C | EPM9560WC208-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Device Family | MAX 9000 | — |
| Series | EPM9560 | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 35 |
| Flip-Flops | 772 | 772 |
| User I/O Pins | 149 | — |
| Supply Voltage | 3.3 V or 5 V | — |
| Maximum Clock Frequency | 117.6 MHz | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | 16.6 ns | — |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| Package | CQFP-208 (Ceramic Quad Flat Pack) | 208-pin CQFP (Ceramic Quad Flat Pack) |
| Terminal Pitch | 0.50 mm | 0.50 mm |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG | JTAG (IEEE 1149.1 boundary scan) |
| Operating Temperature Grade | C (Commercial) | — |
| MultiVolt I/O | Yes (3.3 V / 5 V tolerant) | — |
| RoHS Status | ROHS3 Compliant | RoHS3 Compliant (per third-party listings) |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | — |
| Family | — | MAX 9000 |
| Device Type | — | EE PLD (Electrically Erasable Programmable Logic Device) |
| Technology | — | CMOS |
| User I/O Pins (max) | — | 149 |
| Propagation Delay (tPD) | — | 16.6 ns |
| Speed Grade | — | -15 |
| Supply Voltage - I/O | — | 3.3 V or 5.0 V (configurable) |