EPM9560WC208-20C vs EPM9560RC208-20N Comparison
Detailed side-by-side comparison of EPM9560WC208-20C by Altera and EPM9560RC208-20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560WC208-20C | EPM9560RC208-20N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 (EE PLD) | MAX 9000 (EPM9560) |
| Series | EPM9560 | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | — |
| User I/O Pins | 149 | 149 |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Maximum Clock Frequency | [DATA_NEEDED: fMAX value not in verified data] | — |
| Process Technology | CMOS, Electrically Erasable | — |
| Supply Voltage | 3.3 V or 5 V (configurable I/O) | 5.0 V |
| Package | 208-pin CQFP (Ceramic Quad Flat Pack) | 208-pin RQFP (PowerQuad Flat Pack) |
| Pin Count | 208 | — |
| Programming Interface | JTAG BST (in-system programmable) | — |
| Operating Temperature Grade | Commercial (C suffix) | — |
| Mounting Type | Surface Mount (Ceramic QFP) | Surface Mount |
| RoHS Status | ROHS3 Compliant (per fpgalink listing) | Lead-free (N suffix) |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Usable Gates | — | 12,000 |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Operating Temperature | — | [DATA_NEEDED: operating temperature range] |
| Logic Architecture | — | Multiple Array MatriX (MAX), third-generation CMOS EEPROM |
| Flip-Flops | — | 772 (per EPM9560 series data) |
| Speed Grade | — | -20 (20 ns) |
| MSL Level | — | [DATA_NEEDED: MSL level] |