KAD2710C-17Q68 vs KAD2708L-35Q68 Comparison
Detailed side-by-side comparison of KAD2710C-17Q68 by Renesas Electronics and KAD2708L-35Q68 by Renesas Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Renesas Electronics
KAD2710C-17Q68 - 10-Bit 170MSPS Pipelined ADC, 68-QFN | Renesas
KAD2710C-17Q68 ✓ ActiveRenesas Electronics
KAD2708L-35Q68 - 8-bit, 350MSPS Single-Channel ADC | Renesas
KAD2708L-35Q68 ✓ ActiveSpecification Comparison
| Parameter | KAD2710C-17Q68 | KAD2708L-35Q68 |
|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics |
| Category | ADC/DAC | ADC/DAC |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $24.80 | $19.50 |
| Resolution | 10 bit | 8 bits |
| Sampling Rate (KAD2710C-17 variant) | 170 MSPS | — |
| Number of Channels | 1 | 1 (single-channel) |
| Architecture | Pipelined | Pipelined, FemtoCharge CMOS |
| Family Sampling Rate Range | 105/170/210/275 MSPS | — |
| Input Type | Single-ended analog, AC-coupled | — |
| Output Interface | Parallel LVCMOS | — |
| Analog Supply Voltage | 1.8 V (typical) | — |
| Digital Output Supply Voltage | 3.3 V (typical, LVCMOS) | — |
| SNR at fIN = 138 MHz | 55.6 dBFS (family typ, 275 MSPS) | — |
| Power Dissipation (275 MSPS, family typ) | 265 mW | — |
| Input Clock Divider | Selectable divide-by-2 | — |
| Over-Range Indicator | Yes | Yes |
| Package | 68-QFN (10x10 mm) with exposed pad | 68-Ld QFN (10 mm × 10 mm) with exposed paddle |
| Operating Temperature Range | -40C to +85C (industrial) | -40 °C to +85 °C |
| Process Technology | Standard CMOS, FemtoCharge technology | — |
| RoHS Status | Compliant (QFN package, Q68 suffix) | Compliant (Pb-free matte tin plate) |
| Sample Rate (max) | — | 350 MSPS |
| Input Voltage Range (Differential) | — | 1.5 VP-P |
| Analog Input Bandwidth | — | 600 MHz |
| SNR (fIN = 175 MHz) | — | 48.8 dBFS |
| Power Consumption (typ) | — | < 330 mW |
| Digital Output Interface | — | LVCMOS, parallel |
| Output Coding | — | Two's complement |
| AVDD2 Supply | — | 1.8 V |
| AVDD3 Supply | — | 3.3 V |
| Internal Reference | — | Yes (on-chip) |
| Track-and-Hold | — | Internal |
| Clock Divider | — | Selectable divide-by-2 |
| Mounting Type | — | Surface Mount |
| MSL Level | — | Per datasheet TB363 |