LCMXO3LF-6900C-5BG256C vs LCMXO3LF-6900E-5MG256I Comparison
Detailed side-by-side comparison of LCMXO3LF-6900C-5BG256C by Lattice Semiconductor and LCMXO3LF-6900E-5MG256I by Lattice Semiconductor. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Lattice Semiconductor
LCMXO3LF-6900C-5BG256C - 6864-LUT MachXO3LF FPGA | Lattice
LCMXO3LF-6900C-5BG256C ✓ ActiveLattice Semiconductor
LCMXO3LF-6900E-5MG256I - 6864 LUT MachXO3LF FPGA | Lattice
LCMXO3LF-6900E-5MG256I ✓ ActiveSpecification Comparison
| Parameter | LCMXO3LF-6900C-5BG256C | LCMXO3LF-6900E-5MG256I |
|---|---|---|
| Brand | Lattice Semiconductor | Lattice Semiconductor |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $15.68 |
| Device Type | MachXO3LF field-programmable gate array (FPGA) | — |
| Logic Elements | 6,864 LUTs | — |
| Embedded Memory | 240 Kbits | 245,760 bits |
| I/O Count | 206 I/Os | — |
| Supply Voltage | 2.5 V and 3.3 V | — |
| Package | 256-LFBGA | 256-ball csfBGA (MG256), 0.5 mm pitch |
| Package Type | BGA-256 | — |
| Speed Grade | Slow grade | -5 |
| Temperature Grade | Commercial | — |
| Configuration | Non-volatile, instant-on FPGA | — |
| I/O Signaling | MIPI, LVDS, and sub-LVDS support identified in verified data | — |
| Programmable Logic | FPGA LUT-based programmable logic | — |
| Embedded RAM Type | Embedded block RAM | — |
| Development Support | MachXO3LF Starter Kit supported | — |
| Configuration Memory Support | SPI Flash external boot and dual-boot evaluation support | — |
| Mounting Type | Surface mount | Surface Mount (BGA) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Family | — | MachXO3LF |
| Series / Grade | — | 6900E |
| Logic Elements / LUTs | — | 6,864 LUTs |
| User I/O Count | — | 206 |
| Configuration Memory | — | On-chip Flash (non-volatile) |
| Core Voltage | — | 1.2 V |
| Single-Rail Supply Option | — | 2.5 V / 3.3 V |
| Process Technology | — | 65 nm Flash + CMOS |
| Operating Temperature | — | -40C to +100C (Industrial) |
| I/O Banks | — | Multiple banks (LVCMOS 1.2 V - 3.3 V, LVDS) |
| Configuration Interfaces | — | I2C / SPI / Slave JTAG |
| PLLs | — | 2 PLL pairs |