MC9S08DZ60ACLF vs MC9S08DV60AMLF Comparison

Detailed side-by-side comparison of MC9S08DZ60ACLF by NXP Semiconductors and MC9S08DV60AMLF by NXP Semiconductors. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

NXP Semiconductors
MC9S08DV60AMLF MC9S08DV60AMLF - 8-Bit 40MHz CAN/LIN MCU 60KB Flash | NXP

MC9S08DV60AMLF - 8-Bit 40MHz CAN/LIN MCU 60KB Flash | NXP

MC9S08DV60AMLF ✓ Active

Specification Comparison

Parameter MC9S08DZ60ACLF MC9S08DV60AMLF
Brand NXP Semiconductors NXP Semiconductors
Category Microcontrollers Microcontrollers
Lifecycle Status NRND Active
Stock Status In Stock In Stock
Unit Price (USD) $6.85 $4.60
Core HCS08 (8-bit CISC) —
Core Frequency 40 MHz (20 MHz bus) —
Program Memory (Flash) 60 KB (60K x 8) —
RAM 4 KB —
EEPROM / Emulated EEPROM Available (size [DATA_NEEDED: EEPROM size]) —
Operating Voltage 2.7 V to 5.5 V —
Supply Rails 3.3 V / 5 V —
ADC 24-channel, 12-bit, 2.5 us conversion 8-channel 10-bit (per datasheet family)
CAN 1 x CAN 2.0 A/B —
LIN Master LIN 2.0 interface —
Communication Peripherals SCI (SPI), IIC, MSCAN —
Timer / PWM Channels Multiple (count [DATA_NEEDED: timer/PWM channel count]) —
LCD Driver Yes (on-chip segment LCD driver) —
Package 48-LQFP (7x7 mm) 48-LQFP (7x7 mm)
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: AEC-Q100 grade range] -40C to +125C
Mounting Type Surface Mount Surface Mount
MSL Level MSL 3 (per JEDEC J-STD-020) —
RoHS Status Compliant ROHS3 Compliant
Background Debug Mode (BGND) Yes (on-chip emulation/debug) —
Instruction Set HC08 instruction set with added BGND instruction —
Manufacturer — NXP Semiconductors (formerly Freescale)
Series — S08
Core Processor — HCS08 (enhanced HC08 with BGND)
Core Size — 8-bit
Core Speed — 40 MHz (20 MHz bus)
Program Memory Size — 60 KB (60K x 8) Flash
RAM Size — 3 KB
Supply Voltage Range — 2.7 V to 5.5 V
Number of I/O — 53 GPIO + 1 input-only
Communication Interfaces — MSCAN (CAN 2.0A/B), SCI/SPI, LIN master
Timers — Multiple TPM (per datasheet family)
Debug Interface — Single-wire BDM

Datasheets & Resources

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