MIMXRT1062DVL6B vs MCIMX6Y1CVK05AB Comparison
Detailed side-by-side comparison of MIMXRT1062DVL6B by NXP Semiconductors and MCIMX6Y1CVK05AB by NXP Semiconductors. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
NXP Semiconductors
MIMXRT1062DVL6B - i.MX RT1062 600MHz Cortex-M7 MCU | NXP
MIMXRT1062DVL6B ✓ ActiveNXP Semiconductors
MCIMX6Y1CVK05AB - i.MX 6ULL ARM Cortex-A7 MPU 528MHz | NXP
MCIMX6Y1CVK05AB ✓ ActiveSpecification Comparison
| Parameter | MIMXRT1062DVL6B | MCIMX6Y1CVK05AB |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.75 | $13.90 |
| Core Architecture | Arm Cortex-M7 | ARM Cortex-A7 (32-bit) |
| Maximum CPU Frequency | 600 MHz | 528 MHz |
| FPU | Single + Double Precision | — |
| On-chip SRAM | 1 MB | — |
| Cache | 16 KB I-cache + 16 KB D-cache | — |
| Operating Voltage (Core) | 0.95 V to 1.05 V | — |
| Operating Voltage (I/O) | 3.0 V to 3.6 V | — |
| Operating Temperature | -40C to +105C (Industrial) | -40C to +105C (industrial) |
| Package | 196-LFBGA (10x10 mm) | 272-MAPBGA (9x9 mm), 0.5 mm pitch |
| Mounting Type | Surface Mount (BGA) | — |
| External Memory Bus | Dual FlexSPI (QSPI/Octal SPI/HyperBus) | — |
| Display Controller | LCDIF, up to WXGA (1366x768) | Integrated LCD up to WXGA 1366x768 |
| Graphics Accelerator | 2D PxP engine | — |
| Camera Interface | 8-bit CSI (parallel) | — |
| USB | 2x USB 2.0 OTG with integrated PHY | — |
| Ethernet | 10/100 Mbit MAC | 2x 10/100 MAC with IEEE 1588 |
| CAN | 2x FlexCAN (CAN FD) | 2x CAN-FD |
| Security | CAAM, TrustZone-M, eFuse secure boot | CAAM, HABv4 secure boot, OTF DRAM encryption |
| RoHS Status | Compliant | Compliant |
| MSL Level | 3 (168 hours) | — |
| Manufacturer | — | NXP Semiconductors |
| Product Family | — | i.MX 6ULL Applications Processors |
| Number of Cores | — | 1 |
| L1 Instruction Cache | — | 32 KB |
| L1 Data Cache | — | 32 KB |
| L2 Cache | — | 128 KB |
| Memory Interface | — | LPDDR2 / DDR3 / DDR3L / LPDDR3 (16-bit) |
| Supply Voltage | — | 1.0 V core / 1.8 V / 3.3 V I/O |
| USB Controllers | — | 2x USB 2.0 (one with HS PHY) |