MIMXRT1062DVL6B vs MCIMX6Y1CVK05AB Comparaison
Comparaison détaillée côte à côte de MIMXRT1062DVL6B par NXP Semiconductors et MCIMX6Y1CVK05AB par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MCIMX6Y1CVK05AB - i.MX 6ULL ARM Cortex-A7 MPU 528MHz | NXP
MCIMX6Y1CVK05AB ✓ ActifComparaison des spécifications
| Paramètre | MIMXRT1062DVL6B | MCIMX6Y1CVK05AB |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,75 | $13,90 |
| Core Architecture | Arm Cortex-M7 | ARM Cortex-A7 (32-bit) |
| Maximum CPU Frequency | 600 MHz | 528 MHz |
| FPU | Single + Double Precision | — |
| On-chip SRAM | 1 MB | — |
| Cache | 16 KB I-cache + 16 KB D-cache | — |
| Operating Voltage (Core) | 0.95 V to 1.05 V | — |
| Operating Voltage (I/O) | 3.0 V to 3.6 V | — |
| Température de fonctionnement | -40C to +105C (Industrial) | -40C to +105C (industrial) |
| Boîtier | 196-LFBGA (10x10 mm) | 272-MAPBGA (9x9 mm), 0.5 mm pitch |
| Type de montage | Surface Mount (BGA) | — |
| External Memory Bus | Dual FlexSPI (QSPI/Octal SPI/HyperBus) | — |
| Display Controller | LCDIF, up to WXGA (1366x768) | Integrated LCD up to WXGA 1366x768 |
| Graphics Accelerator | 2D PxP engine | — |
| Camera Interface | 8-bit CSI (parallel) | — |
| USB | 2x USB 2.0 OTG with integrated PHY | — |
| Ethernet | 10/100 Mbit MAC | 2x 10/100 MAC with IEEE 1588 |
| CAN | 2x FlexCAN (CAN FD) | 2x CAN-FD |
| Security | CAAM, TrustZone-M, eFuse secure boot | CAAM, HABv4 secure boot, OTF DRAM encryption |
| Statut RoHS | Compliant | Compliant |
| Niveau MSL | 3 (168 hours) | — |
| Manufacturer | — | NXP Semiconductors |
| Product Family | — | i.MX 6ULL Applications Processors |
| Number of Cores | — | 1 |
| L1 Instruction Cache | — | 32 KB |
| L1 Data Cache | — | 32 KB |
| L2 Cache | — | 128 KB |
| Memory Interface | — | LPDDR2 / DDR3 / DDR3L / LPDDR3 (16-bit) |
| Tension d'alimentation | — | 1.0 V core / 1.8 V / 3.3 V I/O |
| USB Controllers | — | 2x USB 2.0 (one with HS PHY) |