MPC8535EAVTATH vs MPC8536EAVTAQG Comparison
Detailed side-by-side comparison of MPC8535EAVTATH by NXP Semiconductors and MPC8536EAVTAQG by NXP Semiconductors. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
NXP Semiconductors
MPC8535EAVTATH - PowerPC e500 MPU 1.25GHz 783-FCPBGA | NXP
MPC8535EAVTATH ✓ ActiveNXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndSpecification Comparison
| Parameter | MPC8535EAVTATH | MPC8536EAVTAQG |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | NRND |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $118.90 | $218.75 |
| Core Architecture | PowerPC e500 | — |
| Processor Series | MPC85xx PowerQUICC III | MPC85xx (PowerQUICC III) |
| Number of Cores | 1 | 1 |
| Data Bus Width | 32-bit | 32 bit |
| Maximum Core Frequency | 1.25 GHz | — |
| Package Type | 783-FCPBGA (29x29 mm) | — |
| Supply Voltage | 1.0 V core / 1.5 V, 1.8 V, 2.5 V, 3.3 V I/O | [DATA_NEEDED: core/IO supply voltage] |
| Process Technology | 90 nm CMOS | — |
| Operating Temperature | 0C to +105C (TJ) [DATA_NEEDED: full ambient range] | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free | Yes [DATA_NEEDED: confirm RoHS] | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL rating] | — |
| Memory Controller | DDR/DDR2 SDRAM | — |
| Ethernet Controllers | Dual Gigabit Ethernet with TCP/IP acceleration | — |
| Security Engine | Integrated IPsec / SSL / TLS / bulk crypto accelerator | — |
| Programmable Engine | QUICC Engine subsystem | — |
| Core | — | PowerPC e500, 32-bit |
| Maximum Clock Frequency | — | 1.0 GHz |
| Package | — | 783-FCPBGA (29x29 mm) |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| MSL Level | — | [DATA_NEEDED: MSL rating] |
| RoHS Status | — | [DATA_NEEDED: RoHS compliance] |