MPC8535EAVTATH vs MPC8536EAVTAQG Comparaison
Comparaison détaillée côte à côte de MPC8535EAVTATH par NXP Semiconductors et MPC8536EAVTAQG par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC8535EAVTATH - PowerPC e500 MPU 1.25GHz 783-FCPBGA | NXP
MPC8535EAVTATH ✓ ActifNXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndComparaison des spécifications
| Paramètre | MPC8535EAVTATH | MPC8536EAVTAQG |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $118,90 | $218,75 |
| Core Architecture | PowerPC e500 | — |
| Processor Series | MPC85xx PowerQUICC III | MPC85xx (PowerQUICC III) |
| Number of Cores | 1 | 1 |
| Largeur du bus de données | 32-bit | 32 bit |
| Maximum Core Frequency | 1.25 GHz | — |
| Package Type | 783-FCPBGA (29x29 mm) | — |
| Tension d'alimentation | 1.0 V core / 1.5 V, 1.8 V, 2.5 V, 3.3 V I/O | [DATA_NEEDED: core/IO supply voltage] |
| Process Technology | 90 nm CMOS | — |
| Température de fonctionnement | 0C to +105C (TJ) [DATA_NEEDED: full ambient range] | [DATA_NEEDED: operating temperature range] |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free | Yes [DATA_NEEDED: confirm RoHS] | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL rating] | — |
| Memory Controller | DDR/DDR2 SDRAM | — |
| Ethernet Controllers | Dual Gigabit Ethernet with TCP/IP acceleration | — |
| Security Engine | Integrated IPsec / SSL / TLS / bulk crypto accelerator | — |
| Programmable Engine | QUICC Engine subsystem | — |
| Core | — | PowerPC e500, 32-bit |
| Fréquence d'horloge maximale | — | 1.0 GHz |
| Boîtier | — | 783-FCPBGA (29x29 mm) |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance] |