RTAX1000SL-1CGS624B vs RTAX1000SL-CGS624V Comparison
Detailed side-by-side comparison of RTAX1000SL-1CGS624B by Microchip Technology and RTAX1000SL-CGS624V by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
RTAX1000SL-1CGS624B - Rad-Tolerant FPGA 1M Gates | Microchip
RTAX1000SL-1CGS624B ✓ ActiveMicrochip Technology
RTAX1000SL-CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CGS624V ✓ ActiveSpecification Comparison
| Parameter | RTAX1000SL-1CGS624B | RTAX1000SL-CGS624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3,200.00 | $3,400.00 |
| Logic Density | 1,000,000 equivalent system gates | — |
| ASIC Gates | 125,000 additional ASIC gates | — |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGAs |
| Series | RTAX1000SL | — |
| Speed Grade | -1 | — |
| Technology | Digital CMOS | Digital CMOS antifuse |
| Programming Technology | Anti-fuse (one-time programmable, live at power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Package | 624-ball Ceramic CGA (CGS624) | CGS624 (624-column ceramic grid array) |
| Mounting Type | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space flight qualified) | Radiation-tolerant (TID/SEE per manufacturer qualification) |
| Qualification | DLA SMD 5962-0422006QUA per MIL-PRF-38535 | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Supply Voltage | [DATA_NEEDED: core/IO supply voltage] | [DATA_NEEDED: core supply voltage] |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | [DATA_NEEDED: maximum user I/O count] |
| RoHS Status | [DATA_NEEDED: RoHS status] | — |
| Architecture Base | Derived from Microsemi commercial Axcelerator family | — |
| System Gates | — | 1,000,000 |
| Logic Cells | — | 18144 |
| CLBs | — | 12096 |
| Programmability | — | One-Time Programmable (antifuse), live at power-up |
| Clock Resources | — | Segmentable clocks, chip-wide highway routing |
| Carry Logic | — | Yes (dedicated fast carry chain) |
| Application Domain | — | Space-flight systems |
| Max Family Density | — | 4,000,000 equivalent system gates |
| Base Commercial Family | — | Axcelerator |