RTAX250SL-1LG624EV vs RTAX250S-1LG624V Comparison
Detailed side-by-side comparison of RTAX250SL-1LG624EV by Microchip Technology and RTAX250S-1LG624V by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
RTAX250SL-1LG624EV - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-1LG624EV ✓ ActiveMicrochip Technology
RTAX250S-1LG624V - 250K-Gate Rad-Tolerant FPGA 1.5V | Microchip
RTAX250S-1LG624V ✓ ActiveSpecification Comparison
| Parameter | RTAX250SL-1LG624EV | RTAX250S-1LG624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Family | RTAX-SL (Radiation-Tolerant FPGA) | RTAX-S Radiation-Tolerant FPGA |
| Equivalent System Gates | 250,000 gates | — |
| Logic Cells (CLBs) | 2816 | — |
| Total Cells (CMOS architecture) | 4224 | — |
| Maximum Toggle Rate | 649 MHz | — |
| Process Technology | 0.15 um CMOS antifuse | — |
| Core Supply Voltage | 1.5 V | 1.5 V nominal |
| Speed Grade | -1 | -1 |
| Package | 624-pin ceramic LGA (LG624) | CGA624 (LG624), 624-column ceramic column grid array |
| Configuration Type | One-time programmable antifuse, live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Radiation Tolerance | Radiation-tolerant (spaceflight qualified flow) | Radiation-tolerant (RTAX-S family, SEU-tolerant) [DATA_NEEDED: TID and SEU LET figures] |
| Application Flow | Space-flight (EV qualification suffix) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Number of User I/O (LG624) | [DATA_NEEDED: user I/O count] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - ceramic space-grade package typically exempt] |
| Equivalent Gate Count | — | 250000 gates |
| Configurable Logic Blocks (CLBs) | — | 2816 |
| Logic Cells | — | 4224 |
| I/Os | — | 248 |
| Package Suffix | — | V (leaded column finish) |
| Technology | — | CMOS, antifuse programmable |
| Configuration | — | Live at power-up, single chip, no boot PROM |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| Lifecycle Status | — | Active |