STM32G031J6M6TR vs STM32G041J6M6 Comparison
Detailed side-by-side comparison of STM32G031J6M6TR by STMicroelectronics and STM32G041J6M6 by STMicroelectronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
STMicroelectronics
STM32G031J6M6TR - 64MHz Cortex-M0+ MCU | STMicroelectronics (Tape & Reel)
STM32G031J6M6TR ✓ ActiveSpecification Comparison
| Parameter | STM32G031J6M6TR | STM32G041J6M6 |
|---|---|---|
| Brand | STMicroelectronics | STMicroelectronics |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Product Type | 32-bit ARM Cortex-M0+ Microcontroller | 32-bit ARM Cortex-M0+ microcontroller |
| Processor Core | Arm Cortex-M0+ | — |
| Architecture | 32-bit RISC | — |
| Maximum CPU Frequency | 64 MHz | 64 MHz |
| Flash Memory | 32 KB | 32 KB |
| Flash Organization | 32K x 8 bits | — |
| SRAM | 8 KB | 8 KB |
| SRAM Parity Check | Hardware parity check | — |
| Operating Voltage Range | 1.7 V to 3.6 V | — |
| USART Count | 2 | 2 |
| Peripheral Blocks | Timers, ADC, and communication interfaces | — |
| Package | 8-pin SOIC | 8-pin SOIC |
| Mounting Type | Surface Mount | Surface mount |
| VREF+ Connection on Packages Without VREF+ Pin | Internally connected to VDD | — |
| VCORE Supply | Internal supply for digital peripherals, SRAM, and Flash memory | — |
| VCORE Generation | Embedded linear voltage regulator | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | [DATA_NEEDED: AEC-Q100 qualification status] |
| Supply Voltage Range | — | 1.7 V to 3.6 V |
| Processor Architecture | — | Arm Cortex-M0+, 32-bit RISC |
| ADC | — | 1 ADC |
| Cryptographic Accelerator | — | AES-256 |
| Timer Resources | — | General-purpose timers |
| Communication Interfaces | — | USART and communication interfaces |
| Package Code | — | 8-SO |
| Shipping Package | — | Tube |
| Reference Connection | — | VREF+ internally connected to VDD on packages without a VREF+ pin |
| Reference Buffer | — | Must be kept disabled when VREF+ is internally connected to VDD |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |